EDGE=00, PINSEL=00, PWTRDY=0, PWTIE=0, POVIE=0, PRDYIE=0, PRE=000, PCLKS=0, PWTSR=0, PWTOV=0, PWTEN=0
Pulse Width Timer Register 1
| PWTOV | PWT Counter Overflow 0 (0): PWT counter no overflow. 1 (1): PWT counter runs from 0xFFFF to 0x0000. |
| PWTRDY | PWT Pulse Width Valid 0 (0): PWT pulse width register(s) is not up-to-date. 1 (1): PWT pulse width register(s) has been updated. |
| PWTSR | PWT Soft Reset 0 (0): No action taken. 1 (1): Writing 1 to this field will perform soft reset to PWT. |
| POVIE | PWT Counter Overflow Interrupt Enable 0 (0): Disable PWT to generate interrupt when PWTOV is set. 1 (1): Enable PWT to generate interrupt when PWTOV is set. |
| PRDYIE | PWT Pulse Width Data Ready Interrupt Enable 0 (0): Disable PWT to generate interrupt when PWTRDY is set. 1 (1): Enable PWT to generate interrupt when PWTRDY is set. |
| PWTIE | PWT Module Interrupt Enable 0 (0): Disables the PWT to generate interrupt. 1 (1): Enables the PWT to generate interrupt. |
| PWTEN | PWT Module Enable 0 (0): The PWT is disabled. 1 (1): The PWT is enabled. |
| PRE | PWT Clock Prescaler (CLKPRE) Setting 0 (000): Clock divided by 1. 1 (001): Clock divided by 2. 2 (010): Clock divided by 4. 3 (011): Clock divided by 8. 4 (100): Clock divided by 16. 5 (101): Clock divided by 32. 6 (110): Clock divided by 64. 7 (111): Clock divided by 128. |
| EDGE | PWT Input Edge Sensitivity 0 (00): The first falling-edge starts the pulse width measurement, and on all the subsequent falling edges, the pulse width is captured. 1 (01): The first rising edge starts the pulse width measurement, and on all the subsequent rising and falling edges, the pulse width is captured. 2 (10): The first falling edge starts the pulse width measurement, and on all the subsequent rising and falling edges, the pulse width is captured. 3 (11): The first-rising edge starts the pulse width measurement, and on all the subsequent rising edges, the pulse width is captured. |
| PINSEL | PWT Pulse Inputs Selection 0 (00): PWTIN[0] is enabled. 1 (01): PWTIN[1] is enabled. 2 (10): PWTIN[2] enabled. 3 (11): PWTIN[3] enabled. |
| PCLKS | PWT Clock Source Selection 0 (0): Bus clock is selected as the clock source of PWT counter. 1 (1): Alternative clock is selected as the clock source of PWT counter. |
| PPW | Positive Pulse Width |